Postgraduate Course: Analogue VLSI A (ELEE11041)
Course Outline
| School |
School of Engineering |
College |
College of Science and Engineering |
| Course type |
Standard |
Availability |
Available to all students |
| Credit level (Normal year taken) |
SCQF Level 11 (Postgraduate) |
Credits |
20 |
| Home subject area |
Electronics |
Other subject area |
None |
| Course website |
None
|
Taught in Gaelic? |
No |
| Course description |
The course is primarily a laboratory course that will involve two, three-hour, lab sessions plus a lecture, every week for ten weeks.
The lab is centred on a custom designed ASIC. The ASIC, which was fabricated on the AMS 0.35żm CMOS process, contains a number of single transistors and small sub-circuits such as current mirrors, differential stages, a bandgap reference, a simple DAC and a set of passive components.
The ASIC is mounted on a sophisticated, purpose-designed PCB that includes a PIC, a liquid crystal display, DACs, a Direct Digital Synthesis chip and many other devices that serve to support and augment the analogue ASIC. This PCB can communicate directly with a PC via a USB link. The result is a purpose-designed mixed-signal environment where analogue and mixed signal phenomena can be examined in detail.
The whole laboratory course is supported throughout by Cadence simulation, so you will see how simulation and reality fit together, where the differences lie, and how to account for them.
|
Entry Requirements
| Pre-requisites |
Students MUST have passed:
|
Co-requisites |
|
| Prohibited Combinations |
|
Other requirements |
None
|
| Additional Costs |
None |
Information for Visiting Students
| Pre-requisites |
Honours BEng or MEng in Electronics and Electrical Engineering, or equivalent |
| Displayed in Visiting Students Prospectus? |
Yes |
Course Delivery Information
|
| Delivery period: 2010/11 Semester 1, Available to all students (SV1)
|
WebCT enabled: Yes |
Quota: None |
| Location |
Activity |
Description |
Weeks |
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
| King's Buildings | Lecture | | 6-10 | 11:10 - 12:00 | | | | | | King's Buildings | Lecture | | 1-11 | | | 11:10 - 12:00 | | | | King's Buildings | Lecture | | 1-5 | | | | 11:10 - 12:00 | |
| First Class |
Week 1, Monday, 11:10 - 12:00, Zone: King's Buildings. Classroom 5, Hudson Beare Building |
| Exam Information |
| Exam Diet |
Paper Name |
Hours:Minutes |
Stationery Requirements |
Comments |
| Main Exam Diet S1 (December) | Analogue VLSI A | 1:30 | 8 sides | |
Summary of Intended Learning Outcomes
| The students will understand fundamentals in analogue integrated circuit design. They will be able to use the most up to date industrial simulator for IC design. They will have a good amount of practical experience and will be able to relate measured results to simulated results. |
Assessment Information
| Assessment is based in equal parts on continuous work in the lab, an assignment and an exam. |
Special Arrangements
| None |
Additional Information
| Academic description |
Not entered |
| Syllabus |
Not entered |
| Transferable skills |
Not entered |
| Reading list |
Not entered |
| Study Abroad |
Not entered |
| Study Pattern |
Not entered |
| Keywords |
analogue circuit MOS |
Contacts
| Course organiser |
Dr Martin Reekie
Tel: (0131 6)50 5563
Email: H.M.Reekie@ed.ac.uk |
Course secretary |
Mrs Laura Smith
Tel: (0131 6)50 5690
Email: laura.smith@ed.ac.uk |
|
copyright 2011 The University of Edinburgh -
13 January 2011 6:00 am
|
University Homepage