Postgraduate Course: CMOS IC testing (ELEE11046)
Course Outline
| School |
School of Engineering |
College |
College of Science and Engineering |
| Course type |
Standard |
Availability |
Available to all students |
| Credit level (Normal year taken) |
SCQF Level 11 (Postgraduate) |
Credits |
10 |
| Home subject area |
Electronics |
Other subject area |
None |
| Course website |
None
|
Taught in Gaelic? |
No |
| Course description |
This module combines the subject areas of digital signal processing (DSP), automatic test and built in self test to bring together knowledge and techniques that may be applied to the testing of analogue and mixed signal CMOS circuits in an integrated circuit in a systems on chip environment.
The concepts of coherence and coherent testing are used to introduce the Fourier Voltmeter and its implementation as an algorithm using a DSP based test system. The application of DSP-based testing to multi-frequency testing, frequency sweep and measurement of distortion is introduced and there is discussion of errors and accuracy estimation. The sampling of non-coherent signals is included to cover situations where coherence is not possible.
Sources of noise are introduced and a simple test fixture interfacing with a DSP-based measurement system is discussed. Noise spectral density is defined and sampled noise measurement is covered. The important aspects of measurement bandwidth, accuracy, repeatability and sampling are introduced and discussed.
Data converters are ubiquitous in modern electronic systems and their testing is an important consideration. Sources of error in data converters are discussed and the concepts behind data converter testing are introduced. Techniques such as best fit straight line testing, endpoint testing, major transition testing and code histograms are introduced. The careful use of the fast Fourier transform (FFT) in dynamic testing of data converters and noise source separation is considered.
Implicit digitisation is introduced as an alternative to more conventional explicit digitisation and the relative advantages of each approach are discussed in relation to analogue test and event digitisation. Testing strategies for a common analogue circuit building block (for example the operational amplifier) are considered in detail. The concepts of model based analogue circuit test are introduced. |
Entry Requirements
| Pre-requisites |
|
Co-requisites |
|
| Prohibited Combinations |
|
Other requirements |
None
|
| Additional Costs |
None |
Information for Visiting Students
| Pre-requisites |
BEng or MEng Electronics and Electrical Engineering degree,
or similar |
| Displayed in Visiting Students Prospectus? |
Yes |
Course Delivery Information
|
| Delivery period: 2010/11 Semester 2, Available to all students (SV1)
|
WebCT enabled: Yes |
Quota: None |
| Location |
Activity |
Description |
Weeks |
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
| King's Buildings | Lecture | | 1-11 | 09:00 - 09:50 | | | | |
| First Class |
First class information not currently available |
| Exam Information |
| Exam Diet |
Paper Name |
Hours:Minutes |
Stationery Requirements |
Comments |
| Main Exam Diet S2 (April/May) | | 1:30 | 8 sides | |
Summary of Intended Learning Outcomes
| Students will understand how to best design integrated circuits so that they can be efficiently, quickly and cheaply tested. |
Assessment Information
| 100% exam |
Special Arrangements
| None |
Additional Information
| Academic description |
Not entered |
| Syllabus |
Not entered |
| Transferable skills |
Not entered |
| Reading list |
Not entered |
| Study Abroad |
Not entered |
| Study Pattern |
Not entered |
| Keywords |
integrated circuit analogue testing |
Contacts
| Course organiser |
Dr Alister Hamilton
Tel: (0131 6)50 5597
Email: Alister.Hamilton@ed.ac.uk |
Course secretary |
Mrs Kim Orsi
Tel: (0131 6)50 5687
Email: Kim.Orsi@ed.ac.uk |
|
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13 January 2011 6:00 am
|
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