Postgraduate Course: Energy Aware Computing (Level 11) (INFR11052)
|School||School of Informatics
||College||College of Science and Engineering
||Availability||Not available to visiting students
|Credit level (Normal year taken)||SCQF Level 11 (Postgraduate)
|Home subject area||Informatics
||Other subject area||None
||Taught in Gaelic?||No
|Course description||This course aims to introduce students to basic concepts and modern techniques in designing, modelling and evaluating energy-efficient computing systems. Low energy/power consumption is the most important design issue in modern computing devices as it has a direct impact not only on the battery life of mobile electronic equipment, but also sets limits on the operating speed of high-performance computing devices. This course will examine techniques to improve energy consumption at circuit (logic gate), micro-architecture, memory hierarchy and, at a lesser degree, at OS, compiler levels. It will also introduce state of the art approaches to energy aware computing by examining selected research papers. Practical coursework will require students to implement and evaluate selected methods in research simulators and to critically review literature in this field.
Entry Requirements (not applicable to Visiting Students)
|Prohibited Combinations|| Students MUST NOT also be taking
Energy Aware Computing (Level 10) (INFR10031)
||Other requirements|| For Informatics PG and final year MInf students only, or by special permission of the School. Prior attendance at undergraduate courses on computer architecture and computer design is desirable although not essential. Students are expected to be competent programmers in C, C++ or Java.
|Additional Costs|| None
Course Delivery Information
|Not being delivered|
Summary of Intended Learning Outcomes
|1 - describe and discuss the factors which contribute to the consumption of power/energy in computing systems and how they affect the system performance.
2 - explain in detail mechanisms found in modern computing systems for conserving energy.
3 - discuss, assess and compare the behaviour and performance of energy-saving techniques on computing micro-architectures
4 - gain familiarity with state-of-the-art tools such as processor simulators, memory models and compilers, and use them to implement and evaluate techniques described in the technical literature.
5 - write and present clear and concise descriptions of complex systems/methods.
6 - locate, summarise and discuss critically peer-reviewed literature on a specific subarea of energy-aware computing.
|Written Examination 50|
Assessed Assignments 50
Oral Presentations 0
There will be two pieces of assessed coursework.
The first (worth 40%) is a project to design, implement and evaluate an energy efficient architectural technique, using state-of-the-art modelling and simulation tools. The students will document their work in a short report and demonstrate it to the course lecturer.
The second piece of coursework (worth 10%) will consist of writing a literature survey and critical evaluation of an area related to the course topics.
Dynamic power consumption in CMOS circuits: voltage, capacitance, switching activity, clock frequency. Leakage power. Metrics: energy efficiency vs performance
*Basic low power design techniques
Voltage scaling. Effective switched capacitance reduction. Leakage power reduction.
*Gate level power modelling
Switching activity. Glitches. Clock-gating, guarded evaluation.
*Processor power modelling and optimisation
Wattch/Simplescalar simulator. Behavioural level transformations. Architectural techniques for energy efficiency.
*Memory subsystem modelling and optimisation
Low-power cache design, e.g. way-predicting
Dynamic Voltage and Frequency Scaling. Dynamic Power Management.
*Compiler and run-time support for low power
Scheduling for low energy consumption. Compiler-driven power efficiency.
Partially asynchronous systems. Power management techniques for sensor networks.
Relevant QAA Computing Curriculum Sections: Architecture, Systems Analysis and Design, Simulation and Modelling, Computer Hardware Engineering
||* A selection of conference and journal papers will be provided in class and the course website.
* No required textbook. Some relevant texts:
* S. Kaxiras, M. Martonosi, Computer Architecture Techniques for Power-Efficiency, Synthesis Lectures on Computer Architecture. Morgan&Claypool publishers. doi:10.2200/S00119ED1V01Y200805CAC004
* Power Aware Design Methodologies, M. Pedram, J.M. Rabaey (Eds.) ISBN 1402071523
* Power Aware Computing, R. Melhem, R. Graybill (Eds.) ISBN 0306467860
* Low Power Electronics Design, C. Piguet (Ed.), ISBN 0849319412
Timetabled Laboratories 0
Non-timetabled assessed assignments 40
Private Study/Other 40
|Course organiser||Dr Michael Rovatsos
Tel: (0131 6)51 3263
|Course secretary||Miss Kate Weston
Tel: (0131 6)50 2692