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DRPS : Course Catalogue : School of Informatics : EPCC on-campus

Postgraduate Course: HPC Architectures (EPCC11004)

Course Outline
SchoolSchool of Informatics CollegeCollege of Science and Engineering
Credit level (Normal year taken)SCQF Level 11 (Postgraduate) AvailabilityAvailable to all students
SCQF Credits10 ECTS Credits5
SummaryAfter taking this course students should have a good understanding (from the practioner's perspective) of the way High Performance Computing (HPC) systems are designed and how this affects both the way they are programmed and the performance of applications.
Course description The course will cover the following topics:

- Basic components of HPC systems: processors, memory, interconnect, storage.
- Classification of architectures: SIMD/MIMD, shared vs distributed memory, clusters
- System software: OSs, processes, threads, scheduling, batch systems.
- Brief history of HPC systems, including Moore's Law.
- CPU design: functional units, instructions sets, pipelining, branch prediction, ILP (superscalar, VLIW, SIMD instructions), multithreading.
- Caches: operation and design features
- Memory: operation and design features, including cache coherency and consistency
- Multicore CPUs, including cache and memory hierarchy
- GPGPUs: operation and design features
- Interconnects: operation and design features
- Current HPC architectures

Lectures will be followed by tutored practical sessions illustrating the key concepts.
Entry Requirements (not applicable to Visiting Students)
Pre-requisites Co-requisites
Prohibited Combinations Other requirements None
Information for Visiting Students
Pre-requisitesPractical exercises will require students to be able to read and udnerstand programmes written in C. The course looks at hardware as it relates to HPC, thus familiarity with different hardware components outwith an HPC context will be beneficial.

N.B. This is a postgraduate level course not an introductory course for undergraduate students.
Course Delivery Information
Academic year 2024/25, Available to all students (SV1) Quota:  84
Course Start Semester 1
Timetable Timetable
Learning and Teaching activities (Further Info) Total Hours: 100 ( Lecture Hours 20, Supervised Practical/Workshop/Studio Hours 10, Feedback/Feedforward Hours 1, Formative Assessment Hours 1, Summative Assessment Hours 2, Revision Session Hours 1, Programme Level Learning and Teaching Hours 2, Directed Learning and Independent Learning Hours 63 )
Assessment (Further Info) Written Exam 90 %, Coursework 10 %, Practical Exam 0 %
Additional Information (Assessment) Written Exam 90%
Coursework (Class test) 10%

Written examination comprised of 3 compulsory questions (equally weighted).

Coursework (class test) is an examination question presented to the students mid-Semester. This will be undertaken in time-limited conditions similar to an exam but during the course and providing students a mid-Semester opportunity to judge their progress and identify (with the help of feedback) any area(s) of weakness.
Feedback Via practical class exercises, coursework and on the exam.
Exam Information
Exam Diet Paper Name Hours & Minutes
Main Exam Diet S1 (December)HPC Architectures2:00
Learning Outcomes
On completion of this course, the student will be able to:
  1. Understand the key components of HPC architectures and be able to apply this understanding to specific examples
  2. Understand the basic principles of operation of these components, how they interact, and be able to analyse this operation
  3. Evaluate the main design choices and trade-offs in HPC architecture.
  4. Understand how the components are put together to form complete systems and analyse such systems
  5. Explain the balance between HPC system software and hardware in terms of system management
Reading List
Provided via Learn/Leganto
Additional Information
Graduate Attributes and Skills Solution Exploration, Evaluation and Prioritisation.
Critical thinking
Communication of complex ideas in accessible language
Working in an interdisciplinary field
Programming and Scripting
Special Arrangements There are limited spaces on this course. Students not on the MSc in High Performance Computing or MSc High Performance Computing with Data Science should contact the course secretary to confirm availability and confirm that they have the required prerequisites before being enrolled on the course.
KeywordsComputer Architectures,HPC,HPCA,HA,EPCC,High Performance Computing,Parallelism,Parallel,Filesystems
Course organiserDr Darren White
Tel: (01316)51 3415
Course secretaryMr James Richards
Tel: 90131 6)51 3578
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