Undergraduate Course: Digital System Design 4 (ELEE10007)
Course Outline
| School | School of Engineering |
College | College of Science and Engineering |
| Course type | Standard |
Availability | Available to all students |
| Credit level (Normal year taken) | SCQF Level 10 (Year 4 Undergraduate) |
Credits | 10 |
| Home subject area | Electronics |
Other subject area | None |
| Course website |
None |
Taught in Gaelic? | No |
| Course description | This course is lecture based and is taken by all students taking the forth year of electronics and/or electrical engineering degree in Semester 2. It comprises one 22 lecture module with 8 tutorials. It is assessed 100% by examination. The course covers: Computer Architecture ( from a hardware perspective); Components of Computers; Microprocessor Design; and Parallel Computing Architectures |
Information for Visiting Students
| Pre-requisites | Students should be familiar with combinational and sequential logic circuit design, understand and be able to design state machines. They should also understand datapaths and be familiar with the associated arithmetic circuits. |
| Displayed in Visiting Students Prospectus? | Yes |
Course Delivery Information
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| Delivery period: 2014/15 Semester 2, Available to all students (SV1)
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Learn enabled: Yes |
Quota: None |
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Web Timetable |
Web Timetable |
| Course Start Date |
12/01/2015 |
| Breakdown of Learning and Teaching activities (Further Info) |
Total Hours:
100
(
Lecture Hours 22,
Seminar/Tutorial Hours 8,
Programme Level Learning and Teaching Hours 2,
Directed Learning and Independent Learning Hours
68 )
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| Additional Notes |
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| Breakdown of Assessment Methods (Further Info) |
Written Exam
100 %,
Coursework
0 %,
Practical Exam
0 %
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| Exam Information |
| Exam Diet |
Paper Name |
Hours & Minutes |
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| Main Exam Diet S2 (April/May) | | 2:00 | |
Summary of Intended Learning Outcomes
At the conclusion of the course the students should be able to:
1. Understand digital logic.
2. Understand the different types of computer: embedded, PCs, data-centres, supercomputing; and be able to evaluate the design trade-offs.
3. Discern the differences between software and hardware description languages.
4. Evaluate processor performance: CPU time, instruction count, CPI, benchmarks, power consumption and cost effectiveness.
5. Evaluate the performance improvements from parallel computing architectures.
6. Understand instruction sets: RISC, CISC, types of instruction.
7. Understand and evaluate processor architectures: pipelining, hazards, and branch prediction.
8. Understand computer memory and caching: direct mapped, set-associative and multi-level caches.
9. Evaluate cache performance.
10. Understand I/O and peripherals and evaluate their performance: throughput, latency.
11. Understand the design of modern processors with parallel architectures.
12. Understand the design and implementation of graphics processor units (GPUs)
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Assessment Information
| 2 hour Examination, Questions:1 in Section A (20 marks), 2 from 3 in Section B (20 marks each), 60 marks total. |
Special Arrangements
| None |
Additional Information
| Academic description |
Not entered |
| Syllabus |
Not entered |
| Transferable skills |
Not entered |
| Reading list |
1. Computer Organisation and Design, The Hardware / Software Interface, Patterson & Hennesey, 4th Edition.
ISBN: 9780123747501
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| Study Abroad |
Not entered |
| Study Pattern |
Not entered |
| Keywords | Not entered |
Contacts
| Course organiser | Dr Adam Stokes
Tel: (0131 6)50 5611
Email: Adam.Stokes@ed.ac.uk |
Course secretary | Mrs Sharon Potter
Tel: (0131 6)51 7079
Email: Sharon.Potter@ed.ac.uk |
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