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DRPS : Course Catalogue : School of Engineering : Electronics

Undergraduate Course: Digital Systems Laboratory 3 (ELEE09018)

Course Outline
SchoolSchool of Engineering CollegeCollege of Science and Engineering
Credit level (Normal year taken)SCQF Level 9 (Year 3 Undergraduate) AvailabilityAvailable to all students
SCQF Credits10 ECTS Credits5
SummaryThe aim of this lab course is to produce students who are
capable of developing synchronous digital circuits from high
level functional specifications and prototyping them on to
FPGA hardware using a standard hardware description
Course description Week 2: Hello world, Hello lots of worlds & Hello synchronous world
Week 3: Shifting the world & Shifting many worlds
Week 4: Counting the world & Timing the world
Week 5: Decoding the world & Timing the world in decimal
Week 6: Colour the world
Week 7: World of state machines & assessment
Week 8: World of linked state machines
Week 9: SPI communication & assessment
Week 10: Snake game
Week 11: Assessment
Entry Requirements (not applicable to Visiting Students)
Pre-requisites Co-requisites
Prohibited Combinations Other requirements None
Additional Costs None - If possible, boards can be lent to student to use at home in exchange for a deposit to be paid back at the end of semester
Information for Visiting Students
Pre-requisitesKnowledge and understanding of the basics of combinational
and synchronous digital circuits
High Demand Course? Yes
Course Delivery Information
Academic year 2015/16, Available to all students (SV1) Quota:  None
Course Start Semester 1
Timetable Timetable
Learning and Teaching activities (Further Info) Total Hours: 100 ( Formative Assessment Hours 1, Summative Assessment Hours 10, Programme Level Learning and Teaching Hours 2, Directed Learning and Independent Learning Hours 87 )
Assessment (Further Info) Written Exam 0 %, Coursework 100 %, Practical Exam 0 %
Additional Information (Assessment) 100% lab-based assessment: 3 Checkpoints in total, with weight of 25%, 35% and 40%.
Feedback Not entered
No Exam Information
Learning Outcomes
1. Knowledge and understanding of:
I. Combinatorial and sequential circuits and number of ways of
designing them;
II. Basic and linked state machines and a number of ways of
designing them;
III. The importance of modular design, and design for reuse;
IV. The importance of a structured circuit development flow
including functional specification, design, simulation, synthesis,
implementation and testing;
V. A standard hardware description language and how it can
be used to capture digital circuit designs at different levels of

2. Intellectual
I. Ability to use and choose between different techniques for
digital circuit design and capture;
II. Ability to evaluate synthesis results and correlate them with
the corresponding high level design and capture;

3. Practical
I. Ability to use a commercial digital circuit development tool
suite to develop synchronous digital circuits and prototype
them on to FPGA hardware;
Reading List
Digital Design, An Embedded Systems Approach Using Verilog
By Peter J Ashenden, Morgan Kaufmann, 2007, ISBN-13: 978-
Additional Information
Graduate Attributes and Skills Not entered
KeywordsDigital Circuits,Sequential and combinatorial circuits,synchronous circuits and Verilog
Course organiserDr Jiabin Jia
Tel: (0131 6)51 3568
Course secretaryMrs Lynn Hughieson
Tel: (0131 6)50 5687
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