Undergraduate Course: Analogue Circuits and Digital System Design 3 (ELEE09033)
|School||School of Engineering
||College||College of Science and Engineering
|Credit level (Normal year taken)||SCQF Level 9 (Year 3 Undergraduate)
||Availability||Available to all students
|Summary||This course aims to build on the material presented in second year and to give the students an intuitive feel for the basic building blocks of analogue and digital circuits.
Analysis and design of discrete and integrated bipolar junction transistor (BJT) and CMOS based analogue circuits.
To enhance students understanding and design skills of combinational and sequential digital circuit design techniques. To introduce the concepts and techniques for datapath and FSM design.
1.2 Current sources and sinks
1.3 Small signal circuit models. Worked examples on small signal ac gain
2.1 MOS: Introduction And Basic Operation
2.2 MOS Small signal model
2.3 First Circuits: source follower
2.4 MOS Switch
2.5 Current sinks and current mirrors
2.6 Cascode current mirrors
2.7 Inverting amplifiers
2.8 Cascode amplifiers
2.9 Differential circuits, Worked examples
Logic design fundamentals. State machines, equivalent states and state reduction. Implication
Introduction to hardware description languages (HDL). Synthesis. Behavioural, structural and data
flow (register-transfer level, RTL) models.
Programmable logic devices. Simple programmable logic devices, complex programmable logic
devices, field programmable gate arrays, programmable SoCs.
Design Examples. Data path, controller model.
Adders. Critical path, carry-lookahead adder, parallel prefix adder.
Multipliers. Add and shift multiplier, array multiplier. Signed integer/fraction multiplier.
State machine charts. Microprogramming.
Designing with FPGAs. Shannon¿s decomposition. Carry chains. Cascade chains. Dedicated
multipliers. Dedicated memory. Cost of programmability. Design translation (Synthesis). Mapping,
placement and routing.
Floating point arithmetic. Multiplication and addition.
Verification of digital systems. Functional verification. Timing verification.
Information for Visiting Students
|Pre-requisites||Knowledge of basic analogue and digital circuit theory.
|High Demand Course?
Course Delivery Information
|Academic year 2018/19, Available to all students (SV1)
|Learning and Teaching activities (Further Info)
Lecture Hours 38,
Seminar/Tutorial Hours 6,
Feedback/Feedforward Hours 22,
Programme Level Learning and Teaching Hours 4,
Directed Learning and Independent Learning Hours
|Assessment (Further Info)
|Additional Information (Assessment)
||Written Exam %: 100%«br /»
Practical Exam %: «br /»
Coursework %: «br /»
||Hours & Minutes
|Main Exam Diet S1 (December)||3:00|
|Resit Exam Diet (August)||3:00|
On completion of this course, the student will be able to:
- Know the MOS tansistor model, linear and saturation regions, dc equations and MOS capacitances and be able to design simple MOS current mirrors, simple and cascode inverter circuits, source follower circuits and (some years only) differential amplifier circuits.
- Understand the concept of synthesis and modern digital circuit design using hardware description languages (HDL).
- Understand basic datapath structures, including adder and multiplier architectures.
- Understand the design of combinational and sequential logic systems including finite state machines and state reduction techniques.
|Digital Systems Design Using VHDL, 3rd (international) edition, Charles H. Roth, Jr. and Lizy Kurian John. Publisher: Cengage Learning ISBN-13: 978-1-305-63892-1|
P E Allen and D G Holmberg, CMOS Analog Circuit Design 2nd edition, Oxford 2002, ISBN 0-19-511 644-5
B Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001, ISBN 0-07-118815-0
Bogart et al Electronic Devices & Circuits 6th Edition, Pub Prentice Hall
DA Neamen, Electronic Circuit Analysis and Design. McGraw-Hill, 2001 ISBM 0-07-118176-8
Digital Integrated Circuits: A Design Perspective, J.M. Rabaey, Prentice Hall (1996), ISBN 0 13 1786091
Digital Design (Verilog): An Embedded Systems Approach Using Verilog (26 Oct 2007)by Peter Ashenden
FSM based Digital Design using Verilog HDL by Peter Minns and Ian Elliot. Pub: Wiley (2008) ISBN:978-0470-06070-4
|Graduate Attributes and Skills
|Keywords||Analogue circuits,CMOS,bipolar,transistor,digital circuits,combinational logic,adder,FSM,datapath
|Course organiser||Dr Alister Hamilton
Tel: (0131 6)50 5597
|Course secretary||Mrs Laura Robinson
Tel: (0131 6)50 5053