Undergraduate Course: Digital Systems Laboratory 3 (ELEE09018)
|School||School of Engineering
||College||College of Science and Engineering
|Credit level (Normal year taken)||SCQF Level 9 (Year 3 Undergraduate)
||Availability||Available to all students
|Summary||The aim of this lab course is to produce students who are
capable of developing synchronous digital circuits from high
level functional specifications and prototyping them on to
FPGA hardware using a standard hardware description
Week 2: Hello world, Hello lots of worlds & Hello synchronous world
Week 3: Shifting the world & Shifting many worlds
Week 4: Counting the world & Timing the world
Week 5: Decoding the world & Timing the world in decimal
Week 6: Colour the world
Week 7: World of state machines & assessment
Week 8: World of linked state machines
Week 9: SPI communication & assessment
Week 10: Snake game
Week 11: Assessment
Information for Visiting Students
|Pre-requisites||Knowledge and understanding of the basics of combinational
and synchronous digital circuits
|High Demand Course?
Course Delivery Information
|Not being delivered|
On completion of this course, the student will be able to:
- Understand combinatorial and sequential circuits and number of ways of designing them.
- Implement basic and linked state machines.
- Appreciate the importance of modular design and reuse.
- Familiarised with the development flow of FPGA programming.
- Master a hardware description language Verilog.
|Digital Design, An Embedded Systems Approach Using Verilog|
By Peter J Ashenden, Morgan Kaufmann, 2007, ISBN-13: 978-
|Graduate Attributes and Skills
|Keywords||Digital Circuits,Sequential and combinatorial circuits,synchronous circuits and Verilog
|Course organiser||Dr Jiabin Jia
Tel: (0131 6)51 3568
|Course secretary||Mrs Megan Inch-Kellingray
Tel: (0131 6)51 7079