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DEGREE REGULATIONS & PROGRAMMES OF STUDY 2010/2011
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DRPS : Course Catalogue : School of Engineering : Electronics

Undergraduate Course: Communication Engineering 3 (ELEE09012)

Course Outline
School School of Engineering College College of Science and Engineering
Course type Standard Availability Available to all students
Credit level (Normal year taken) SCQF Level 9 (Year 3 Undergraduate) Credits 20
Home subject area Electronics Other subject area None
Course website None Taught in Gaelic? No
Course description Communications: This course studies both analogue and digital communications techniques. However, the main emphasis is on analogue radio communications since the topics of digital communication and communication networks can be studied in detail in the fourth year. The method of learning is mainly by studying examples of real communications systems and the theory of their operation. Hardware demonstrations are used to illustrate the operation of some systems. At the end of the course the student should have a good grasp of basic communication theory, and the reasons for using a particular modulation type or system architecture.

Satway: Satway is an exercise in analogue circuit design to realise the circuitry to display a television signal as a picture on a standard oscilloscope.
Entry Requirements
Pre-requisites Students MUST have passed: Electronics 2 (ELEE08010) AND Electronic Circuits and Devices 2 (ELEE08011)
Co-requisites
Prohibited Combinations Other requirements None
Additional Costs None
Information for Visiting Students
Pre-requisites None
Displayed in Visiting Students Prospectus? Yes
Course Delivery Information
Delivery period: 2010/11 Semester 2, Available to all students (SV1) WebCT enabled:  Yes Quota:  None
Location Activity Description Weeks Monday Tuesday Wednesday Thursday Friday
King's BuildingsLecture1-11 11:10 - 12:00
King's BuildingsLecture1-11 11:10 - 12:00
King's BuildingsTutorialExamples class1-11 16:10 - 17:00
King's BuildingsTutorialExamples class1-11 16:10 - 17:00
First Class Week 1, Tuesday, 11:10 - 12:00, Zone: King's Buildings. Lecture Theatre 201, Grant Institute
Additional information Tutorials: Friday 16:10 - 17:00
Examples: Tuesday 16:10 - 17:00
Exam Information
Exam Diet Paper Name Hours:Minutes Stationery Requirements Comments
Main Exam Diet S2 (April/May)1:302 x 12 sides
Resit Exam Diet (August)1:3012 sides
Summary of Intended Learning Outcomes
Design simple serial or parallel tuned circuit filters for use in communications systems from a carrier frequency, impedance and bandwidth specification. Calculate the image frequency for heterodyne systems and describe methods for reducing the image frequency problem. Perform simple noise, gain and distortion calculations for cascaded amplifiers. Recognise and describe amplitude modulated (AM) and frequency modulated (FM) signals in terms of their time domain waveforms and frequency spectra. Describe simple circuits for the generation and reception of AM and FM signals. Perform basic bandwidth, signal to noise ratio and efficiency calculations for AM and FM signals. Describe how Vidicon television cameras produce a luminance and chroma video signal, how the luminance, chroma and sound are combined for transmission and how the luminance, chroma and sound signals are separated at the receiver. Describe or design a simple frequency synthesiser using a phase locked loop or direct digital synthesis.
Describe various pulse modulation schemes and circuits for their generation and reception. Recognise phase shift keyed and quadrature amplitude digital modulation constellations and calculate the number of bits per symbol for a constellation. Describe the use of error correcting codes for error rate improvement in digital communications. Be able to design voltage amplifier, ramp generator and sync. pulse separator circuits. Be able to implement a multistage amplifier design which withstands the effects of inter-stage loading between successive stages. Be able to implement effective decoupling in a design. Be able to integrate a number of separate stages to implement a complete working system to a written specification. Be able to document a design that they have carried out. Be able to layout and implement a printed circuit board design.
Assessment Information
1.5 hour examination + Laboratory Mark for Satway
Special Arrangements
None
Additional Information
Academic description Not entered
Syllabus Not entered
Transferable skills Not entered
Reading list Not entered
Study Abroad Not entered
Study Pattern Not entered
Keywords Not entered
Contacts
Course organiser Dr Pei-Jung Chung
Tel: (0131 6)50 5565
Email: P.Chung@ed.ac.uk
Course secretary Miss Nicola Marshall
Tel: (0131 6)50 5687
Email: Nicola.Marshall@ed.ac.uk
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copyright 2011 The University of Edinburgh - 31 January 2011 7:41 am