Undergraduate Course: Digital Systems Laboratory (ELEE10023)
Course Outline
| School | School of Engineering |
College | College of Science and Engineering |
| Course type | Standard |
Availability | Available to all students |
| Credit level (Normal year taken) | SCQF Level 10 (Year 4 Undergraduate) |
Credits | 10 |
| Home subject area | Electronics |
Other subject area | None |
| Course website |
None |
Taught in Gaelic? | No |
| Course description | This lab aims to produce students who are capable of developing hardware-software digital systems from high level functional specifications, and prototyping them on to FPGA hardware using a standard hardware description language and software programming language. |
Information for Visiting Students
| Pre-requisites | Students should be familiar with digital design using Verilog, and embedded system programming using C. |
| Displayed in Visiting Students Prospectus? | No |
Course Delivery Information
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| Delivery period: 2014/15 Semester 2, Available to all students (SV1)
|
Learn enabled: Yes |
Quota: 18 |
|
Web Timetable |
Web Timetable |
| Course Start Date |
12/01/2015 |
| Breakdown of Learning and Teaching activities (Further Info) |
Total Hours:
100
(
Supervised Practical/Workshop/Studio Hours 30,
Programme Level Learning and Teaching Hours 2,
Directed Learning and Independent Learning Hours
68 )
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| Additional Notes |
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| Breakdown of Assessment Methods (Further Info) |
Written Exam
0 %,
Coursework
100 %,
Practical Exam
0 %
|
| No Exam Information |
Summary of Intended Learning Outcomes
1. Knowledge and understanding of:
I. Data paths and Control paths and number of ways of designing them;
II. Instruction-set based control path design;
III. Control and data path integration;
IV. Capture the design of hardware-software digital systems in a standard hardware description language.
2. Intellectual:
I. Ability to use and choose between different techniques for digital system design and capture;
II. Ability to evaluate implementation results (e.g. speed, area, power) and correlate them with the corresponding high level design and capture.
3. Practical:
I. Ability to use a commercial digital system development tool suite to develop a hardware-software digital system and prototype them on to FPGA hardware. |
Assessment Information
| Ongoing academic assessment during lab sessions through a number of checkpoints (100%). |
Special Arrangements
| None |
Additional Information
| Academic description |
Not entered |
| Syllabus |
Not entered |
| Transferable skills |
Not entered |
| Reading list |
Digital Design (Verilog): An Embedded Systems Approach using Verilog - Peter Ashenden |
| Study Abroad |
Not entered |
| Study Pattern |
Not entered |
| Keywords | Embedded Digital System Design, Embedded Processor Programming, Verilog, Data path and Control Path |
Contacts
| Course organiser | Dr Alister Hamilton
Tel: (0131 6)50 5597
Email: Alister.Hamilton@ed.ac.uk |
Course secretary | Mrs Sharon Potter
Tel: (0131 6)51 7079
Email: Sharon.Potter@ed.ac.uk |
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